SEMINARS & WORKSHOPS
Guest Lecture Verilog HDL for Digital Design and VLSI Industry Insights
A guest lecture on “Verilog HDL for Digital Design and VLSI Industry Insights” was conducted exclusively for 4th-semester EEE students under the aegis of PES IEEE SBC. The session was delivered by Dr Praveen Kumar Reddy K, DFT Engineer at Truechip Technologies, Bangalore. The lecture aimed to provide practical exposure to digital hardware design using Verilog HDL.
The resource person explained fundamental concepts such as modules, data types, and operators in a clear and structured manner. Key topics including combinational and sequential circuit design, flip-flops, counters, registers, and finite state machines were discussed in detail. Different modelling styles, including behavioural, structural, and dataflow modelling, were demonstrated through coding examples.
The session was highly interactive and helped students connect theoretical concepts with real-world hardware implementation. Practical demonstrations included Verilog programmes for Half Adder, Full Adder, Decoder, and Counters. Insights into digital logic design and the evolution of chips based on Moore’s Law were also shared with the participants.
The speaker further provided an overview of the VLSI industry, highlighting various career opportunities and professional roles available in the field. He also explained chip design methodologies such as top-down and bottom-up approaches using simple and easy-to-understand examples.